Never heard of a Thorton CPU before

[MrLuigi]

This if from today's Fry's e-mail ad.
Never heard of a Thorton CPU before.
Must be a mistake.

[someone16]

Thorton is just a mix of Tbred and Barton's. I think it's Tbred speeds but 333 fsb

The AMD Athlon ZP Model 10 Thorton is essentially a Barton with half of the L2 cache disabled. It is intended as a replacement to the Thoroughbred series. The Thorton is a 266MHz bus model.

If one is ambitious, the additional 256KB can often be enabled with no problems. You simply need to connect the L2 bridges. Better break out the crayon first to fill the surface voids, then connect ther bridges with conductive trace paint to obtain a full-fledged Barton. The trick seems to work about 90% of the time.

Robert Richmond

[rpertusio]

Take a look at endian.net's description

Introduced: 2003-09-18

Description: A cross between Thoroughbred and Barton, for low cost Athlons. Seems to be a full Barton but with half the L2 cache disabled. Now finally confirmed by AMD as "Athlon XP Processor Model 10 with 256 K L2 cache". Starts at 2000+ to 2600+ which translates to 1.65 to 2.06 GHz.

I had heard rumors that it was going to be a new Duron, but I guess not.

- rp

The current Duron model should be the last in the Duron series, though AMD has reserved rights to resurrect the product name if required at a later date.

Paris (2H04, 130nm SOI) and Palermo (2H05, 90nm SOI) will be the next major entry-level 32-bit chips from AMD once the Athlon 64 undergoes widespread marketing later this year. Both will be marketed as Athlon XP processors.

Robert Richmond

[Xtreeme]

Yup. Barton with half l2 off is what it is. They have been out for a while now.