Dual Channel memory on Socket A: Worth it?

[tony_j15]

Buyers enticed by dual channel DRAM should note one crucial thing: in theory, a dual-channel memory link does not bring any benefits since the data rate is limited by the FSB bus's bandwidth. It's fixed at a maximum 200 MHz (Athlon XP 3200+) to give a bandwidth of 3.2 GB/s. Even using fast dual DDR400 memory with an access time of 6.4 GB/s has no effect on the Front Side Bus bottleneck of 3.2 GB/s. With that in mind, it's really not so inappropriate to question dual-channel memory technology on the Socket A platform.

Taken from Tom's
Any opinions on this? Is that nForce 2 mobo actually worth it?

[elroy]

I read an article on dual channel and it said you would likely gain a few points of performance, maybe 3% over not using dual channel. Is it worth it? That is your decision.

[pickel]

After losing two copmputers to my wife and daughter, I decided , when I built one for me , it would have a good motherbd ( NF7-S)
with dual channel memory regardless, if it only improved the performance or not. I went for the Corsair XMS pro ( 2 x 512 Mgb) with an overclocked XP 2500 @ 192 FSB and I love it. Since I already had the case w/ PS and a good video card 128 Mb G force, my investment wasn't too considerbly high. Go for the best you can and you won't have to do it over or second guess youself.!!!

[MegalosSkylaki]

is litterred with the relics of forgotten theories.
But the bottom line remains:
Does it actually give an improvement?
b) is it a significant and important improvement?
c) is it worth the Co$t ?

The data I've seen general ascribe a 5% to 20% improvement for DDR over SDR and for DualChannel nForce2 over single channel..

In fact, the practical choice is not SDR vs. DDR (unless you have a load of high quality SDR RAM), but whether the nVidia nForce2 chipset and its MOBOs is preferable to the Alternatives with DDR RAM when viewed as a whole.

In the real World, you usually start with what expensive parts (like memory) you already have, and see where you can strike a compromise.

Do you really want those PC2100 modules and the SDR 256 and 512 sit in a bin ?

Let's face it, there is "planned obsolencence" in the Industry.

DOOOGSTER

[Xtreeme]

It helps most when the mem is under rated running a asynch bus. If your cpu is say 333 and your mem 266 duel will help most. Still only few % boost. In Synch mode, it does NOTHING really. The second controler only guess at whats needed next anyhow. It doesnt work like the first mem controler.

[Peter M]

That's the funniest theory I've ever heard about this.

In fact, the twin RAM controllers act fully in parallel, widening the RAM bus from 64 to 128 bits. That's also why you need the DIMMs in identical pairs - EVERY access is split in two and going out to both channels at the same time for doubled bandwidth.

Indeed there is little performance benefit in benchmarks, simply because while the CPU is benched, nothing else runs. In real life, many agents access the RAM, not only the CPU - graphics card, LAN controllers, IDE channels, sound engine, USB ... So having more RAM bandwidth than the CPU can consume does have a positive effect.

[Xtreeme]

"That's the funniest theory I've ever heard about this."

You mean?


"The second controler only guess at whats needed next anyhow."

I read that from some reviews. Toms was one I think? Its wrong? Wasnt toms was somewhere else. This is what confused me about Nforce2 and what I was thinking, but its confusing me now.

"DASP works on the same concept as the hardware prefetch logic's found in modern processors. What the nForce2 does is look for data that's constantly accessed and then try to predict what will be needed next. Once the prediction is made, it'll automatically load the data into memory before the processor requires it.

Office based 2D applications seem to get the biggest boost from DASP. Operations with those types of programs are fairly predictable, but 3D applications like games and 3D rendering programs do not really use DASP since they are more unpredictable."

I first read about DASP at another site with not as good of a explenation. Now it sounds like it only helps the integrated gpu???

[Xtreeme]

tony_j15
All your answers are here.

"Dual channel DDR, sounds impressive doesn't it? There are two independent 64bit memory controllers built into the nForce2 Northbridge and when two DIMM's are installed into each separate memory controller, the nForce2 runs them in parallel which doubles the amount of bandwidth available to the processor. Unfortunately feeding an Athlon processor with more bandwidth then it requires is a bit redundant.

Try to think of it this way, there's a four lane high way (memory bandwidth) with a 100KM/H speed limit (FSB) and there are four cars (data) running parallel to each other going at the speed limit. If we double the number of lanes from four to eight, it doesn't allow any of the cars to run faster because there's a speed limit so the extra lanes go to waste.

In order for the Athlon processor to take advantage of the extra bandwidth available, the processor would have to go through fundamental changes to its architecture so it could send more data (cars).

Please keep in mind though the reason why performance is better when running DC DDR instead of SC (single channel) DDR is because nVIDIA optimized the nForce2 to run DC DDR. In terms of performance difference between DC and SC DDR we're talking less then 200 points in 3DMark2001SE on a nForce2 SPP based system with a Radeon 9700 Pro an AthlonXP 3000+."

http://www.pcstats.com/articleview.cfm?articleID=1420

[Peter M]

The reason why dual channel RAM helps pure CPU benchmarks a tiny wee bit even though from the bandwidth perspective it shouldn't is much simpler than all the marketing bull about advanced chipset trickery would like to make you think. It's (cue drum roll): Latency.

The CPU bus is an extremely low-latency bus, while the RAM bus is not at all low latency. So at the beginning of a larger transfer, the RAM bus always gets a little behind, but if its bandwidth is higher than the CPU bus's, it is then able to catch up again. For the exact same reason, running a single channel of RAM at a faster clock rate than the CPU shows some (tiny) performance improvement.

[Xtreeme]

You know that explains somthing else then "I think". The reason why ram timings and the icnreases they yield on this chipset, are strange. Some not making sense at all. I've been to alot of sites about this northbridge and its reaction to diff mem speeds and brands. Some benefit from more laxed timings then say agresive ones like 2-2-2! Now since there is the "whole dual" thing. And these were dual ch. tests. Its making some sense to me. The chip maybe balanced so to speak in dual to kill latency some as you said. Therefore once its too fast its no longer optimised and the more agresive timings stop yielding gains? Am I close?


"The CPU bus is an extremely low-latency bus, while the RAM bus is not at all low latency. So at the beginning of a larger transfer, the RAM bus always gets a little behind, but if its bandwidth is higher than the CPU bus's, it is then able to catch up again. For the exact same reason, running a single channel of RAM at a faster clock rate than the CPU shows some (tiny) performance improvement."

I read that like 3 times then I got it completly. Like rambus right? Kinda useing higher mhz to counter its latency (lag). Understandable. I could see the benefit. Might have to try 400mhz bus over 333mhz fsb tonight just to see how it is. Every site I read (and thats alot of'em) said it increased latency due to the translation in speed at NB. That a myth? In past asynch bus's have never been very stable. That a thing of the past?
Id have to try it in some "real life" computing, not just benchies.